A lithographic apparatus is a machine that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (e.g., comprising part of, one, or several dies) on a substrate (e.g., a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned. Known lithographic apparatus include so-called steppers, in which each target portion is irradiated by exposing an entire pattern onto the target portion at one time, and so-called scanners, in which each target portion is irradiated by scanning the pattern through a radiation beam in a given direction (the “scanning”-direction) while synchronously scanning the substrate parallel or anti-parallel to this direction. It is also possible to transfer the pattern from the patterning device to the substrate by imprinting the pattern onto the substrate.
Scanner focus can drift over time from the desired set point. Scanner stability feedback loops use measured critical dimension (CD) and side wall angle (SWA) to determine the wafer-level focus correction set for subsequent scanner exposures. To determine focus from CD and SWA, a calibration is performed, in an experiment where the focus is set with a range of offsets and measurements are made to obtain or “get” the CD or SWA. This is called a “set-get” experiment. One such set-get experiment is a focus exposure matrix (FEM). A FEM wafer may be used as calibration wafer for the scatterometer. As is known in the art, a FEM wafer comprises a wafer that has been coated with a photoresist onto which a pattern is exposed with multiple combinations of focus and exposure offsets. The FEM wafer is measured by the metrology tool to determine resist profiles, for example SWA, and line widths, for example CD, and the corresponding focus and exposure settings can be determined that most closely match a desired profile and line width.
In order to calibrate metrology tools used to control the focus of a lithography apparatus, it would be desirable to expose at specified offsets from a perfectly flat wafer plane, but in practice this is not the case. The wafer surface non-uniformity, or wafer stack unflatness, results in the actual focus set point across an exposure field being different from the intended focus set point FSP. This difference is the set point error. The local set point error may be large enough to cause poor definition of the exposed pattern in the resist. Wafer stack unflatness may be caused by a combination of wafer non-uniformity, wafer table non-uniformity and contamination between the wafer and the wafer table. In state of the art lithographic apparatus up to ±15 nm or even higher local stack unflatness may be observed. Focus set points are corrected to take into account the unflatness, by measuring and creating a leveling profile, which is the best height map to have the least leveling errors given the unflatness. When unflatness occurs on a scale smaller than the exposure field, however, then residual focusing errors will still occur in the exposure of the FEM wafer or other calibration target.